Conformal, uniform dielectric films have many applications in semiconductor manufacturing. In the fabrication of sub-micron integrated circuits (ICs) several layers of dielectric film are deposited. Four such layers are shallow trench isolation (STI), premetal dielectric (PMD), inter-metal dielectric (IMD) and interlayer dielectric (ILD). All four of these layers require silicon dioxide films that fill features of various sizes and have uniform film thicknesses across the wafer.
Chemical vapor deposition (CVD) has traditionally been the method of choice for depositing silicon dioxide films. However, as design rules continue to shrink, the aspect ratios (depth to width) of features increase, and traditional CVD techniques can no longer provide void-free gap-fill in these high aspect ratio features.
An alternative to CVD is atomic layer deposition (ALD). ALD methods involve self-limiting adsorption of reactant gases and can provide thin, conformal dielectric films within high aspect ratio features. An ALD-based dielectric deposition technique typically involves adsorbing a metal containing precursor onto substrate surface, then, in a second procedure, introducing a silicon oxide precursor gas. The silicon oxide precursor gas reacts with the adsorbed metal precursor to form a thin film of metal doped silicon oxide. However, one drawback to ALD is that the deposition rates are very low. Films produced by ALD are also very thin (i.e., about one monolayer); therefore, numerous ALD cycles must be repeated to adequately fill a gap feature. These processes are unacceptably slow in some applications in the manufacturing environment.
A related technique, referred to as pulsed deposition layer (PDL) or rapid surface-catalyzed vapor deposition (RVD) processing, is another alternative. PDL is similar to ALD in that reactant gases are introduced alternately over the substrate surface, but in PDL, the silicon oxide film can grow more thickly due to the use of a particular class of precursors that catalyze the reaction. Thus, PDL methods allow for rapid film growth similar to using CVD methods but with the film conformality of ALD methods.
As will be in discussed in detail below, PDL is a two-step process. First, a silicon substrate with a trench or gap on its surface is exposed to a catalyst to form an activated surface. Second, the substrate is then exposed to a silicon-oxide precursor gas. The catalyst-activated surface decomposes the silicon-oxide precursor leading ultimately to growth of a conformal silica film on the substrate. The two processes can be repeated iteratively, which leads to film growth on the exposed substrate surfaces. Ideally, the oxide film would grow uniformly with each cycle to result in a dense uniform film that completely fills the gap structure. However, the processes may fail to completely fill a structure, especially if the gap structure has a high aspect ratio or re-entrant features.
FIG. 1 illustrates an example of an incomplete gap fill with a void. PDL and ALD are known for their capability to form conformal films in very high aspect ratio structures. Initially, as illustrated in FIG. 1a, film growth 102 is uniform in the gap structure or trench, generally numbered 100. However, as the gap structure narrows, FIG. 1b illustrates that the silica precursor can no longer diffuse to the bottom 108 of the trench 100 and film grows preferentially in the upper part 104 of the trench 100. With each iteration of the PDL process, as further illustrated in FIGS. 1c and 1d, an undesirable void 106 is eventually formed in the trench 100. Not to be bound by any single theory, it is believed that diffusion of the silica precursor is slower than the reaction of the silica precursor with the catalyst-decorated surface. This leads to preferential film growth in the upper portion of a trench where the silicon-oxide precursor is readily accessible. The film effectively plugs the upper portion of the trench, forming the void. Void formation is further evidenced when filling re-entrant structures whereby the mouth or top of the structure is narrower than the bottom.
Void formation can also occur in other ways. For example, the highly conformal nature of the PDL and ALD processes results in the formation of seams in gap fill applications where the two fronts of the growing dielectric film meet at the middle of the trench or gap. Upon annealing for film densification or acidic etching solution during subsequent wet process steps, the low density areas of the seams can expand and may result in voids.
There may also be applications where high aspect ratio trenches need to be covered only partially by the dielectric film. For example, an oxide film may be used as a sacrificial mask preventing etching of the underlying structure, in particular the corner features at the top of the trenches. In this application, the oxide film need not extend to the bottom of the trench, and a film cornering only the top ½ or ⅔, for example, of the trench may be preferred.
Additionally, current STI and PMD deposition trench fill schemes deposit the same amount of film inside the trench and on the field. Therefore, a long chemical mechanical polished (CMP) step is required to remove the film on the field.
Accordingly, improved techniques and methods would be desirable to conduct gap fill and other dielectric film depositions using conformal dielectric deposition techniques, such as PDL or ALD.